Publications

  • Hardware-based Always-On Heap Memory Safety, Yonghae Kim, Jaekyu Lee, Hyesoon Kim, IEEE/ACM International Symposium on Microarchitecture (MICRO), Athens, Greece (2020)

  • A Case Study: Exploiting Neural Machine Translation to Translate CUDA to OpenCL, Yonghae Kim, Hyesoon Kim, arXiv preprint arXiv:1905.07653 (2019)

  • Translating CUDA to OpenCL for Hardware Generation using Neural Machine Translation, ACM CGO Student Research Competition (SRC), Yonghae Kim, Hyesoon Kim, Washington, D.C., USA (2019)

Presentations

  • A Case Study: Exploiting Neural Machine Translation to Translate CUDA to OpenCL, Yonghae Kim, Hyesoon Kim, 2nd International Workshop on AI-assisted Design for Architecture (AIDArc), co-located with International Symposium on Computer Architecture (ISCA), Phoenix, AZ (2019)

  • High Speed and Power Efficient Hierarchical SEC-DAEC-DEC code for Reliable Memory (poster), Design Automation Conference (DAC), Yonghae Kim, Joon-sung Yang, Austin, TX, USA (2017)

  • Power Efficient Hierarchical SEC-DAEC-DEC code for Reliable Memory (poster), Design Automation Conference (DAC), Yonghae Kim, Joon-sung Yang, Austin, TX, USA (2016)

Experience

Intern, ARM Research, May. 2019 - Aug. 2019

  • Worked on microarchitecture security
  • Studied a defense mechanism against speculation-based side channel attacks

Engineer, Samsung Electronics, Mar. 2016 - Mar. 2018

  • Worked as a front-end designer (RTL design)
  • Involved in developing memory interface IPs for DDR3/4, LPDDR3/4, and HBM

Intern, Samsung Electronics, Jan. 2015 - Feb. 2015

  • Conducted research on the hardware implementation of PRBS training mechanism for LPDDR4

Honors & Awards

  • Kwanjeong Graduate Fellowship, 2018-present
  • National Science & Technology Scholarship, 2010-11, 2014-15
  • Samsung Scholarship, 2014-2015
  • Sungkyunkwan University Scholarship, 2010-2011

Contact